1. Field of the Invention
The present invention relates generally to a manufacturing method of a semiconductor apparatus, and more particularly to a method in which a two-layer structured electrode wiring film including a silicide film such as a combination of a polysilicon film and a tungsten silicide (WSix) film is formed.
2. Description of the Prior Art
A conventional semiconductor apparatus is described with reference to FIG. 1.
As shown in FIG. 1, an impurity diffusing region 2 is formed on an upper surface of a semiconductor substrate 1, two MOS transistors are formed on the semiconductor substrate 1 to be adjacent to the impurity diffusing region 2, a two-layer structured electrode wiring film 9A composed of a polysilicon film 8 making contact with the impurity diffusing region 2 and a tungsten silicide (WSix) film 9 is formed between the MOS transistors.
In detail, the impurity diffusing region 2 is formed by implanting n+ impurity into an upper portion of the semiconductor substrate 1, a gate insulating film 3 is formed on the semiconductor substrate 1 so as to expose the impurity diffusing region 2, and a first gate electrode 4A and a second gate electrode 4B facing each other are formed on the gate insulating film 3. Also, a first insulating film 5A is formed on the first gate electrode 4A, and a second insulating film 5B is formed on the second gate electrode 4B. Also, a first side wall spacer film 7A is formed on a side wall of a combination of the first gate electrode 4A and the first insulating film 5A, and a second side wall spacer film 7B is formed on a side wall of a combination of the second gate electrode 4B and the second insulating film 5B on condition that the first and second side walls 7A and 7B face each other.
Also, the electrode wiring film 9A composed of the polysilicon film 8 and the tungsten silicide (WSix) film 9 is formed on the impurity diffusing region 2. In the polysilicon film 8, impurity is implanted to make the polysilicon film 8 conductive, so that the polysilicon film 8 is electrically connected with the impurity diffusing region 2.
In addition, a first wiring film 6A is formed on the first insulating film 5A, a second wiring film 6B is formed on the second insulating film 5B, and the first and second wiring films 6A and 6B and the first and second insulating films 5A and 5B are covered with an inter-layer insulating film 10A made of boron-phoso silicate glass.
Also, after a photo-resist film (not shown) is formed on the inter-layer insulating film 10A, an opening area is formed in the inter-layer insulating film 10A by using the photo-resist film as a mask so as to expose the electrode wiring film 9A composed of the polysilicon film 8 and the tungsten silicide (WSix) film 9, and the electrode wiring film 9A and the inter-layer insulating film 10A are covered with a metal wiring film 10B made of aluminum or a material including aluminum (for example, Al--Si--Cu) to electrically make the electrode wiring film 9A contact with the metal wiring film 10B.
To obtain a structure of the conventional apparatus shown in FIG. 1, the polysilicon film 8 is formed to be filled in a concave area between the first side wall spacer film 7A formed on the side wall of the combination of the first gate electrode 4A and the first insulating film 5A and the second side wall spacer film 7B formed on the side wall of the combination of the second gate electrode 4B and the second insulating film 5B, ions are implanted in the polysilicon film 8 to make the polysilicon film 8 conductive, and the tungsten silicide (WSix) film 9 is formed on the polysilicon film 8. Thereafter, after a photo-resist film is formed on the tungsten silicide film 9, the tungsten silicide film 9 and the polysilicon film 8 are patterned by etching and removing a portion of the tungsten silicide film 9 and a portion of the polysilicon film 8 while using the photo-resist film as a mask. Therefore, as shown in FIG. 2, the electrode wiring film 9A is formed.
Thereafter, after the inter-layer insulating film 10A is formed over the entire surface of the electrode wiring film 9A and the entire surface of the first and second insulating films 5A and 5B, an opening area is formed in the inter-layer insulating film 10A to expose the tungsten silicide film 9, an aluminum film is formed over the entire surface of the tungsten silicide film 9 and the entire surface of the inter-layer insulating film 10A and is patterned. Therefore, the metal wiring film 10B electrically connected with the electrode wiring film 9A is formed.
However, in cases where the conventional semiconductor apparatus is manufactured according to the above method, there are many drawbacks. That is, it is required to thin the polysilicon film 8 to arrange the electrode wiring film 9A composed of the polysilicon film 8 and the tungsten silicide (WSix) film 9 in the conventional semiconductor apparatus. Accordingly, because a film thickness of the polysilicon film 8 is made small, as shown in FIG. 2, a ravine area CP is formed on the tungsten silicide (WSix) film 9 when the tungsten silicide (WSix) film 9 is formed on the polysilicon film 8. Therefore, when a photo-resist film planned to be used as a mask in a patterning operation of the electrode wiring film 9A by which the some is patterned in a photo-lithography process by exposing the photo-resist film to light, the photo-resist film undesirably remains in the ravine area CP, so that there is a first drawback that the electrode wiring film 9A cannot be reliably patterned. To prevent this drawback, in cases where an intensity of the exposing light is increased, halation occurs in the exposing operation, so that there is another drawback that the photo-resist film is not correctly patterned and the electrode wiring film 9A cannot be patterned with high accuracy.
Also, because a film thickness of the polysilicon film 8 is made small, a height of the electrode wiring film 9A is lowered. Therefore, as shown in FIG. 1, a height al of a side wall of the inter-layer insulating film 10A is heightened, an opened area surrounded by the side wall of the inter-layer insulating film 10A is deepened. In this case, there is a second drawback that a step coverage of the metal wiring film 10B arranged on the side wall of the inter-layer insulating film 10A is degraded.
To avoid the first and second drawbacks, as shown in FIG. 3, it is postulated that a polysilicon film 8A placed beneath the tungsten silicide (WSix) film 9 is thickened.
However, in an ion implanting process performed to make the polysilicon film 8A conductive, though ions are sufficiently implanted in an upper portion of the polysilicon film 8A, ions are not sufficiently implanted into a bottom portion PB of the polysilicon film 8A near to the impurity diffusing region 2. Also, ions are not sufficiently diffused from the bottom portion PB of the polysilicon film 8A to the substrate 1. Therefore, the polysilicon film 8A is not sufficiently made conductive. Accordingly, there is another drawback that a contact resistance of the polysilicon film 8A becomes higher than a desired value. Also, there is another drawback that contact resistances in various portions of the polysilicon film 8A cannot be uniformly set because implanting amounts of ion in the various portions of the polysilicon film 8A differ from each other.
To sufficiently inject ions into the bottom portion PB of the polysilicon film 8A, it is proposed that an acceleration voltage applied to the ions is heightened.
However, in this case, an amount of ion implanted into the impurity diffusing region 2 placed beneath the polysilicon film 8A is increased, the ions implanted into the impurity diffusing region 2 are diffused in a lateral direction, so that there is another drawback that a punch through occurs in the MOS transistors of the conventional semiconductor apparatus. Also, to prevent the implantation of ions into the first and second gate electrodes 4A and 4B through the first and second insulating films 5A and 5B, it is required to cover a region other than an ion implanting region positioned on the electrode wiring film 9A with a photo-resist. Therefore, there is another drawback that the number of manufacturing processes is increased by adding a masking process.